1. Technical Field
The present invention relates generally to a semiconductor integrated circuit, and more particularly, to a semiconductor memory apparatus.
2. Related Art
In general, data are inputted and outputted in a semiconductor memory apparatus in synchronization with a clock for storage and retrieval.
With high integration and high speed operation design, the semiconductor memory apparatus is configured to receive a signal for data inputting and outputting (which is referred to as a data input/output strobe signal) besides a general clock (referred to an external clock).
Therefore, in a normal operation, a semiconductor memory apparatus receives the external clock and the data input/output strobe signal to perform the operations for receiving data, storing the data, and outputting the stored data.
A test is performed on such a semiconductor memory apparatus to confirm whether or not data are normally inputted and stored. A plurality of channels are formed between a test equipment and the semiconductor memory apparatus, and the test equipment transmits the testing-related signals to the semiconductor memory apparatus through the channels.